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Paper Submission Dates
Submission Open for December-2017
Last Date of Submission :
20th, December-2017
Acceptance Notification :

After Peer Review

Last Date of Publication :
30th, December-2017
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Volume5 ISSUE 11
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Volume5 ISSUE 11
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Volume5 ISSUE 10
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IJVDCS 184

Design and Implementation of Low Power 16-Bit ALU using MGDI Technique

Authors:P. SAI KRISHNA, P. BRUNDAVANI

0954-0959

 
IJVDCS 185

A Novel BISR Scheme with ECC Based Memories for Fault Correction

Authors:VIJAY REDDY C, E. SHUDHAKAR

0960-0965

 
IJVDCS 186

A Transformed High Performance VLSI Architecture for LMS Adaptive Filter using Distributed Arithmetic

Authors:LEELA BHUKYA

0966-0970

 
IJVDCS 187

Linear Feedback Shift Register with Efficient Parallel Architecture

Authors:PAMMI VYSHNAVI, K. ABDUL RAHMAN

0971-0974

 
IJVDCS 188

Power Area Efficient Design using Wallace Multiplier for Finite Impulse Response Filters

Authors:Y. BINDU, CH. CURY

0975-0978

 
IJVDCS 189

Implementation of Digital Signal Risc Processor by Reversible Ripple

Authors:K. SRAVANI, B. KISHORE

0979-0983

 

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IJATIR(www.ijatir.org) Date of Submission: 20th December-2017, Date of Publishing: 30th December-2017
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